Multi-bit high-order incremental converters with digital calibration

Cascade scheme of single order incremental modulators that obtain high-order architectures are studied. The use of high-order obtains a high number of bit with a small number of clock periods. Moreover, it is possible to use multi-bit modulators in the last stages of the chain. The requests of low gain error in the first stages of the cascade are satisfied with an off-line gain mismatch error and digital calibration of result.