An accurate and efficient method for BER analysis in high-speed communication systems

With data rates reaching beyond the Gbps range, timing jitter has become a major limiting factor for todays highspeed communication systems. A novel decomposition algorithm is presented which accurately determines the impact of timing jitter on system performance. Based on collected jitter histograms, the method investigates Gaussian tail behavior of measured distributions and determines random and deterministic components by utilizing an efficient optimization procedure. The resulting timing budget can be used to identify the bit error ratio (BER) of highspeed serial links and for quantification of jitter in clock signals and phase locked loop (PLL) systems. The efficient estimation principle also allows for implementation as embedded system, and thus supports a broad variety of design-for-test (DFT) structures in production testing, on-chip diagnostics and on-line monitoring applications.