DocumentCode
1573167
Title
A 100-Msps 10-bit analog-to-digital converter chip set
Author
Imamura, Makoto ; Kusayanagi, Naoya ; Toyama, Akira ; Choi, Toru
Author_Institution
Yokogawa Electr. Corp., Tokyo, Japan
fYear
1991
Firstpage
68
Lastpage
70
Abstract
A description is given of a 100-Msps 10-bit analog-to-digital converter (ADC) chip set that can be used for a wide-bandwidth high-resolution digital storage oscilloscope. High conversion rate and 500-MHz sampling bandwidth with 10-bit resolution are obtained by a combination of three silicon-bipolar chips and two GaAs-diode chips. The ADC employs a pipelined two-step subranging architecture that uses two cascaded wide-bandwidth track-and-hold circuits (T/H). The design features of the T/H and the residual amplifier are also presented. Test results show that input bandwidth is over 500 MHz, and, up to a 20-MHz input frequency, the signal to noise ratio is better than 45 dB
Keywords
analogue-digital conversion; digital instrumentation; oscilloscopes; pipeline processing; signal processing equipment; 10 bit; 20 MHz; 500 MHz; GaAs diode chip; S/N ratio; Si bipolar chip; analog-to-digital converter chip; cascaded wide-bandwidth track-and-hold circuits; input bandwidth; pipelined two-step subranging architecture; residual amplifier; wide-bandwidth high-resolution digital storage oscilloscope; Analog-digital conversion; Bandwidth; Circuits; Clocks; Gallium arsenide; Impedance; Oscilloscopes; Sampling methods; Schottky diodes; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Instrumentation and Measurement Technology Conference, 1991. IMTC-91. Conference Record., 8th IEEE
Conference_Location
Atlanta, GA
Print_ISBN
0-87942-579-2
Type
conf
DOI
10.1109/IMTC.1991.161541
Filename
161541
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