Title :
Fixed-point arithmetic on a budget: Comparing probabilistic and reduced-precision addition
Author :
George, Jason ; Marr, Bo ; Dasgupta, Aniruddha ; Anderson, David V.
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
Probabilistic CMOS technology or PCMOS, is an ultra-low-power solution particularly well suited to multimedia applications. Novel results are presented here showing that PCMOS computes with less error and less power than reduced-bit-width, or truncated, deterministic arithmetic due to quantization noise injected by limited-precision, fxed-point processing. Simulation results, derived from physical layout of a PCMOS, fixed-point, ripple-carry, adder, are given showing energy savings of up to 2X can be achieved while surpassing the quantization performance of reduced-precision solutions.
Keywords :
CMOS integrated circuits; adders; fixed point arithmetic; integrated circuit layout; logic design; low-power electronics; PCMOS; deterministic arithmetic; fixed-point arithmetic; probabilistic CMOS technology; probabilistic addition; quantization noise; reduced-precision addition; ripple-carry adder; Adders; CMOS technology; Circuit noise; Circuit simulation; Fixed-point arithmetic; Mobile computing; Noise reduction; Power engineering computing; Quantization; Voltage; BIVOS; Fixed Point; Low Power; PCMOS;
Conference_Titel :
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-7771-5
DOI :
10.1109/MWSCAS.2010.5548765
