Title :
Effects of oxidant dosing on GaSb (100) prior to atomic layer deposition and high-performance antimonide-based P-channel MOSFETs with Ni-alloy S/D
Author :
Ze Yuan ; Chien-Yu Chen ; Kumar, Ajit ; Nainani, Aneesh ; Bennett, Brian R. ; Boos, J. Brad ; Saraswat, Krishna C.
Author_Institution :
Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA
Abstract :
Antimonide-based compound semiconductors have recently emerged as potential candidates for replacement of silicon in future high-performance, low-power CMOS technologies, as both n- and p-channel MOSFETs with high electron and hole mobilities have been demonstrated. The high trap density at the interface of GaSb and high-k dielectric is a challenge in fabricating antimonide-based MOSFETs. Recently, wet-clean and in-situ hydrogen plasma exposure prior to atomic layer deposition (ALD) of gate dielectrics have been used to reduce interface trap density. In this paper, we study the effects of in-situ oxidant dosing on the Al2O3/GaSb (100) interface. This surface passivation scheme is integrated with a self-aligned Ni-alloy S/D MOSFET process.
Keywords :
CMOS integrated circuits; III-V semiconductors; MOSFET; aluminium compounds; atomic layer deposition; electron mobility; gallium compounds; high-k dielectric thin films; hole mobility; interface states; nickel alloys; passivation; Al2O3-GaSb; antimonide-based compound semiconductors; antimonide-based p-channel MOSFET; atomic layer deposition; electron mobility; gate dielectrics; high-k dielectric; hole mobility; in-situ hydrogen plasma exposure; interface trap density; low-power CMOS technology; n-channel MOSFET; oxidant dosing; self-aligned Ni-alloy S/D MOSFET process; surface passivation; wet-clean hydrogen plasma exposure; Aluminum oxide; Capacitance-voltage characteristics; Logic gates; MOSFET; Substrates; Surface treatment; Water;
Conference_Titel :
Device Research Conference (DRC), 2013 71st Annual
Conference_Location :
Notre Dame, IN
Print_ISBN :
978-1-4799-0811-0
DOI :
10.1109/DRC.2013.6633777