• DocumentCode
    1573875
  • Title

    Mixed-Signal and Smart-Power Capable Hybrid Structured ASIC for Cost-Aware Single-Chip Integration of Industrial Applications

  • Author

    Zhang, Yipin ; Scherjon, Cor ; Burghartz, Joachim N.

  • Author_Institution
    CHIPS, Inst. for Microelectron. Stuttgart, Stuttgart, Germany
  • fYear
    2012
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A new single-chip integration approach for industrial applications based on novel mixed-signal and smart-power capable hybrid structured ASIC is presented. The hybrid structured ASIC, offering low non-recurring engineering (NRE) costs of low-voltage (LV) structured ASICs as well as power electronic functionalities of cell based smart-power ICs, provides a cost-efficient integration platform for industrial applications. Based on the demonstrator chip fabricated in a 0.8micrometer high-voltage (HV) bipolar, CMOS, DMOS (BCD) silicon on insulator (SOI) process, construction of the hybrid structured ASIC is illustrated in detail and the applicability of the platform is successfully demonstrated.
  • Keywords
    CMOS integrated circuits; application specific integrated circuits; power integrated circuits; silicon-on-insulator; CMOS; DMOS; NRE; SOI process; cost-aware single-chip integration; high-voltage bipolar; industrial applications; mixed-signal hybrid structured ASIC; nonrecurring engineering; power electronic functionalities; silicon on insulator; smart-power IC; smart-power capable hybrid structured ASIC; Application specific integrated circuits; Field programmable gate arrays; Metallization; Periodic structures; Regulators; Resistors; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Power Electronics Systems (CIPS), 2012 7th International Conference on
  • Conference_Location
    Nuremberg
  • Print_ISBN
    978-3-8007-3414-6
  • Type

    conf

  • Filename
    6170679