• DocumentCode
    1574570
  • Title

    A novel algorithm for accurate logarithmic number system subtraction

  • Author

    Paliouras, V. ; Stouraitis, T.

  • Author_Institution
    Dept. of Electr. Eng., Patras Univ., Greece
  • Volume
    4
  • fYear
    1996
  • Firstpage
    268
  • Abstract
    In this paper, a novel algorithm for the computation of Logarithmic Number System (LNS) subtraction is presented. The main feature of the proposed algorithm is that it circumvents the evaluation of the highly nonlinear function traditionally used in logarithmic subtraction. In some cases, this approach permits a reduction of up to 60% in the number of approximation intervals, thus making the realization of cost-effective LNS arithmetic units of very high accuracy feasible. The approach is extended to address certain algorithms that need to be implemented by an LNS processor. Moreover, alternative architectures that implement the computational approach and exhibit different time-area requirements are discussed. For the sake of completeness, upper bounds to the computational errors are offered.
  • Keywords
    digital arithmetic; computational errors; cost-effective LNS arithmetic units; logarithmic number system subtraction; two-MAC architecture; Algorithm design and analysis; Arithmetic; Chebyshev approximation; Computer architecture; Concurrent computing; Dynamic range; Polynomials; Read only memory; Upper bound; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
  • Conference_Location
    Atlanta, GA, USA
  • Print_ISBN
    0-7803-3073-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1996.542021
  • Filename
    542021