Title :
Memory management in high-speed Viterbi decoders
Author :
Rim, Minjoong ; Oh, Young-Uk
Author_Institution :
Samsung Electron. Co. Ltd., Kyoungki, South Korea
Abstract :
Memory management is one of the most important problems in implementing Viterbi decoders. This paper introduces a novel traceback scheme for memory management of high-speed Viterbi decoders. It is suitable for VLSI implementation since its address generation scheme for accessing memory contents is very simple and does not require global interconnection
Keywords :
VLSI; Viterbi decoding; resource allocation; storage management; storage management chips; video coding; VLSI implementation; address generation scheme; high-speed Viterbi decoders; memory management; traceback scheme; Bit error rate; Clocks; Decoding; Forward error correction; Memory management; Read-write memory; Streaming media; Technology management; Video compression; Viterbi algorithm;
Conference_Titel :
VLSI Signal Processing, VIII, 1995. IEEE Signal Processing Society [Workshop on]
Conference_Location :
Sakai
Print_ISBN :
0-7803-2612-1
DOI :
10.1109/VLSISP.1995.527522
