Title :
Redundant complex number arithmetic for high-speed signal processing
Author :
Aoki, Takafumi ; Ohki, Y. ; Higuchi, Tatsuo
Author_Institution :
Dept. of Syst. Inf. Sci., Tohoku Univ., Sendai, Japan
Abstract :
This paper presents a new complex number representation called the Redundant Complex Number System (RCNS) as a useful basis for designing VLSI signal processors with complex arithmetic capability. RCNS described in this paper is defined as a positional number system that has a complex radix 2j and a digit set {-3,…,0,…,3} or {-2,…,0,…,2}. The use of complex radix 2j with the redundant digit set makes possible to construct high-speed complex number arithmetic circuits with highly regular structures. This paper discusses the elementary arithmetic algorithms of RCNS and their implementations
Keywords :
VLSI; digital signal processing chips; redundant number systems; RCNS; VLSI signal processors; complex arithmetic capability; high-speed complex number arithmetic circuits; high-speed signal processing; highly regular structures; positional number system; redundant complex number arithmetic; Adders; Arithmetic; Filtering algorithms; Integrated circuit interconnections; Parallel processing; Process design; Signal design; Signal processing; Signal processing algorithms; Very large scale integration;
Conference_Titel :
VLSI Signal Processing, VIII, 1995. IEEE Signal Processing Society [Workshop on]
Conference_Location :
Sakai
Print_ISBN :
0-7803-2612-1
DOI :
10.1109/VLSISP.1995.527523
