• DocumentCode
    1575612
  • Title

    Tri-layer PEALD ZnO thin film transistors and circuits

  • Author

    Li, Yuanyuan V. ; Sun, Kaige G. ; Ramirez, J. Israel ; Jackson, Thomas N.

  • Author_Institution
    Center for Thin Film Devices, Penn State Univ., University Park, PA, USA
  • fYear
    2013
  • Firstpage
    167
  • Lastpage
    168
  • Abstract
    In oxide semiconductors, defect chemistry and hydrogen can influence free carrier concentration and these materials can have strong interactions with the atmosphere and contaminents.[1,2] An inverted staggered structure is commonly used for oxide TFTs and a high-quality passivation layer is needed to provide protection and minimize back channel surface charge changes.[2,3] Negative shifts in turn-on and threshold voltage after passivation with inorganic thin films have been reported by several groups.[4,5] We have previously reported weak oxidant plasma enhanced atomic layer deposition (PEALD) ZnO TFTs with an ALD-based Al2O3 passivation layer [6]. Before passivation the TFT has a turn-on voltage near 0 V, but significant hysteresis (often > 0.5 V). A 32 nm thick Al2O3 layer deposited by ALD eliminates the hysteresis, but causes a negative shift in turn-on and threshold voltage (~3 V). A 32 nm thick Al2O3 layer deposited by PEALD also removes the hysteresis, but shifts the device turn-on and threshold voltage negative by more than 10 V [6]. We have developed a tri-layer process for bottom-gate, top contact TFTs. An Al2O3-ZnO-Al2O3 tri-layer is deposited sequentially at 200°C and provides effective passivation and reduced turn-on voltage shift.
  • Keywords
    II-VI semiconductors; alumina; atomic layer deposition; hydrogen; passivation; plasma CVD; thin film circuits; thin film transistors; wide band gap semiconductors; zinc compounds; Al2O3-ZnO-Al2O3; PEALD; back channel surface charge changes; defect chemistry; free carrier concentration; high quality passivation layer; hydrogen; inorganic thin film; oxide TFT; oxide semiconductor; plasma enhanced atomic layer deposition; size 32 nm; temperature 200 C; thin film circuit; thin film transistor; threshold voltage; trilayer process; Hysteresis; Logic gates; Passivation; Ring oscillators; Thin film transistors; Threshold voltage; Zinc oxide;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference (DRC), 2013 71st Annual
  • Conference_Location
    Notre Dame, IN
  • ISSN
    1548-3770
  • Print_ISBN
    978-1-4799-0811-0
  • Type

    conf

  • DOI
    10.1109/DRC.2013.6633846
  • Filename
    6633846