DocumentCode :
1575707
Title :
Magnetic logic and computation using magnetic tunnel junctions
Author :
Jian-Ping Wang
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Minnesota, Minneapolis, MN, USA
fYear :
2013
Firstpage :
175
Lastpage :
176
Abstract :
An energy efficient logic device for the post-CMOS era has been the goal of a variety of research fields. The limits of scaling, which we expect to reach by the year 2025, demand that future advances in computational power will not be realized from ever-shrinking device sizes, but rather by innovative designs and new physics. Magnetic tunnel junction has been a promising candidate for future integrated magnetic memory and computation because its unique functionalities [1]. The need for the intermediate circuitry for MTJ based logic hinders fan-out function, adds integration complexity, power consumption, area and delay overheads to logic modules. In this paper, first I will report a recent design of the Magnetic Tunnel Junction-Based Spintronic Logic Units (ALU) and the fabrication of a multiple MTJ based logic circuit which computes logic functions while transferring the data to the next logic gate [2,3,4]. This MTJ logic circuit can perform Majority, AND, OR, NAND, and NOR operations. I will also report a recent design and demonstration of MTJ based nanomagnetic logic (NML), which is nonvolatile and lower power [5]. A key requirement for logic devices is an electrical based input/output (I/O) scheme in order to interface with supplementary electrical components. I will discuss the experimental demonstration of the electrical reading and spin transfer torque programming of dipole coupled nanomagnets using magnetic tunnel junctions (MTJs) [5]. The STT write incorporated a clocking field utilized for magnetic logic applications. For 10-15 nm spacing between nanomagnets, 50 nm × 80 nm and 70 nm × 100 nm, currents of 100-200 μA a re sufficient to program the device.
Keywords :
integrated logic circuits; logic design; low-power electronics; magnetic logic; magnetic tunnelling; magnetoelectronics; nanomagnetics; ALU; MTJ based nanomagnetic logic; NML; STT write; current 100 muA to 200 muA; dipole coupled nanomagnets; electrical based input-output scheme; electrical reading; energy efficient logic device; integrated magnetic memory; magnetic logic applications; magnetic tunnel junction-based spintronic logic units; multiple MTJ based logic circuit; post-CMOS era; size 10 nm to 15 nm; spin transfer torque programming; Junctions; Logic devices; Magnetic devices; Magnetic tunneling; Magnetoelectronics; Torque;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Device Research Conference (DRC), 2013 71st Annual
Conference_Location :
Notre Dame, IN
ISSN :
1548-3770
Print_ISBN :
978-1-4799-0811-0
Type :
conf
DOI :
10.1109/DRC.2013.6633850
Filename :
6633850
Link To Document :
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