Title :
A 2K × 8-bit single-chip digital radio frequency memory
Author :
SanGregory, Sam L. ; Mehalic, Mark A.
Author_Institution :
Dept. of Eng., Cedarville Coll., OH, USA
Abstract :
A single-chip digital-radio-frequency memory incorporating digital signal processing was designed and fabricated. The 7900 × 9200 μm die included 16 K-b of 10 ns dual-port SRAM, a finite state machine for self-controlled operation, and a digital single-sideband modulator for providing a programmable frequency shift on the input data stream
Keywords :
CMOS memory circuits; SRAM chips; VLSI; finite state machines; memory architecture; modulators; radar signal processing; 16 kbit; CMOS VLSI; digital signal processing; digital single-sideband modulator; dual-port SRAM; finite state machine; input data stream; pipeline design; programmable frequency shift; radar signals; self-controlled operation; single-chip digital radio frequency memory; Clocks; Decision support systems; Delay; Digital communication; Digital modulation; Frequency; Jamming; Radar; Rails; Random access memory;
Conference_Titel :
ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-1375-5
DOI :
10.1109/ASIC.1993.410716
