DocumentCode
1576177
Title
Level-Shifting variable current charging technique for high-speed Comparator-Based Switched-Capacitor circuits
Author
Wong, Kim-Fai ; Sin, Sai-Weng ; U, Seng-Pan ; Martins, R.P.
Author_Institution
Analog & Mixed-Signal VLSI Lab., Univ. of Macau, Macao, China
fYear
2010
Firstpage
566
Lastpage
569
Abstract
The utilization of variable current sources, in Comparator-Based Switched-Capacitor (CBSC) circuits, instead of the traditional constant current sources, reveals itself as one of the effective ways to increase speed while maintaining the accuracy. In this paper, a Level-Shifting Variable Current Charging Technique is proposed to implement variable current sources for CBSC circuits. The CBSC gain stage obtained with the proposed technique is applied to a 2-1 Cascaded Multi-Stage (MASH) ΔΣ modulator implemented in 90 nm CMOS for WCDMA applications. Simulation results show that the modulator achieves 75 dB of dynamic range while consuming 2.7 mW.
Keywords
CMOS analogue integrated circuits; current comparators; delta-sigma modulation; switched capacitor networks; CBSC circuits; CMOS process; WCDMA; cascaded multistage ΔΣ modulator; constant current sources; high-speed comparator-based switched-capacitor circuits; level-shifting variable current charging technique; power 2.7 mW; size 90 nm; CMOS technology; Charge transfer; Circuit simulation; Complexity theory; Dynamic range; Sampling methods; Switched capacitor circuits; Switching circuits; Timing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on
Conference_Location
Seattle, WA
ISSN
1548-3746
Print_ISBN
978-1-4244-7771-5
Type
conf
DOI
10.1109/MWSCAS.2010.5548889
Filename
5548889
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