Tuning the Fermi level position at metal/high-k interfaces

Finding the appropriate metallic gate electrodes is a significant bottleneck in the adaptation and integration of high-k dielectrics in metal oxide semiconductor (MOS) technology [1]. A key feature of the electrode is its effective work function (EWF) [2], or the metal´s Fermi level position at its interface with the high-k dielectric, an important parameter for the performance of devices, which should be tuned to a specific level for each type of transistor or memory device. In this presentation we describe some of our studies of the physics behind these approaches with emphasis on correlating the interface microstructure with the electrical properties.