A framework for automatic CMOS OpAmp sizing

The problem of automatic CMOS OpAmp sizing is addressed. Given the specifications and the netlist of the OpAmp, our approach produces a design that has the accuracy of the BSIM models used for simulation and the advantage of a quick design time. The approach is based on generating an initial first-order design by using geometric programming and then refining it using simulations. Device-level simulations performed on a two stage OpAmp prove the efficacy of our approach.