A low power flexible PGA with DC offset cancellation for software defined radio front-ends

This paper proposes a low power flexible programmable gain amplifier (PGA) with DC Offset cancellation for software defined radio front-ends. PGA consists of three-stage amplifiers which includes variable gain amplifier (VGA) and DC offset cancellation circuits. It uses high-pass filtering (HPF) and continuous-time feedback (CTF) techniques to cancel DC offset in the circuit. In VGA, a new technique is proposed to reduce the power consumption. PGA circuit is designed in 0.13um CMOS technology. Its power consumption is 0.2mA to 3.1mA at a 1.2V supply voltage.