Data driven DCVSL: A clockless approach to dynamic differential circuit design

This paper presents a new dynamic circuit design style based on the differential cascade voltage swing logic. The design style is proposed as a data driven dynamic differential logic design style. The proposed design style offers significant performance advantages over conventional DCVSL and Differential Domino with reduced power consumption. The pre-charge and evaluation phases are controlled by suitable combinations of input signals with the two differential paths operating mutually exclusively. The design style was verified through the design of basic logic gates. We also present comparison results for a 32 bit barrel shifter to demonstrate the advantages in power, performance and process variation tolerance of the proposed design scheme.