• DocumentCode
    1577037
  • Title

    Accurate evaluation of gate delay for low-power and high-density 0.18 μm CMOSFET technology

  • Author

    Park, Myoung Kyu ; Lee, Hi-Deok ; Jang, Myoung-Jun ; Choi, Jung-Hun ; Kang, Dae-Gwan ; Hwang, Jeong-Mo

  • Author_Institution
    R&D Div., Hyundai MicroElectron. Co. Ltd., Cheongju, South Korea
  • fYear
    1999
  • fDate
    6/21/1905 12:00:00 AM
  • Firstpage
    427
  • Lastpage
    429
  • Abstract
    The gate delay of ring oscillators in high VT CMOSFET technology is characterized with respect to various channel widths (0.72 μm-10 μm). An expression for gate delay including the channel-width independent capacitance components is derived and compared with experimental results. Substantial increase of gate delay in the narrow channel width region is found due to channel width independent capacitance components which are inherent to transistors. Although the channel width independent capacitance is negligible in wide channel width, gate delay of narrow channel width (⩽1 μm) ring oscillator increased more than 20% compared with 5 μm channel width ring oscillator
  • Keywords
    CMOS digital integrated circuits; ULSI; capacitance; delays; integrated circuit modelling; 0.18 micron; 0.72 to 10 micron; CMOSFET technology; channel widths; gate delay; independent capacitance components; ring oscillators; CMOS technology; CMOSFETs; Capacitance; Delay effects; MOS devices; MOSFET circuits; Random access memory; Ring oscillators; Silicon; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI and CAD, 1999. ICVC '99. 6th International Conference on
  • Conference_Location
    Seoul
  • Print_ISBN
    0-7803-5727-2
  • Type

    conf

  • DOI
    10.1109/ICVC.1999.820953
  • Filename
    820953