• DocumentCode
    15775
  • Title

    Stability Estimation of a 6T-SRAM Cell Using a Nonlinear Regression

  • Author

    Park, Heejung ; Yang, Chih-Kong Ken

  • Author_Institution
    Univ. of California, Los Angeles, Los Angeles, CA, USA
  • Volume
    22
  • Issue
    1
  • fYear
    2014
  • fDate
    Jan. 2014
  • Firstpage
    27
  • Lastpage
    38
  • Abstract
    Static noise margin is one of the key metrics to estimate the likelihood of failure of a 6T-static random-access memory (SRAM) cell. This paper proposes a technique to accurately estimate the stability of a conventional SRAM cell without modifying the cell structure. The main idea is to measure the specific cell´s currents with variant supply levels via the bit lines. The measured currents are used to estimate the read stability and the write ability through a nonlinear regression. The R2 (coefficient of determination) of the stability estimation is as high as 0.95 when applied to an arbitrary data set. As typical stability definitions require an access to the internal node of a 6T-SRAM cell, alternative measurable stability metrics for read and write are surveyed and modified to improve the correlation with the conventional stability definition. With this alternative stability and the cell currents, the conversion rules from currents to the stability can be found from the measurement data. Simulation results show that the estimation error sigma is as small as 2.44% and 3% for the read stability and write-ability estimation, respectively. Validity of the idea is verified by Monte Carlo simulations by using SRAM models in a 45-nm CMOS technology.
  • Keywords
    CMOS memory circuits; Monte Carlo methods; SRAM chips; integrated circuit modelling; regression analysis; 6T-SRAM cell; 6T-static random-access memory cell; CMOS technology; Monte Carlo simulations; SRAM model; arbitrary data set; bit lines; cell currents; conventional SRAM cell stability; conventional stability definition; conversion rules; estimation error sigma; nonlinear regression; read stability; size 45 nm; specific cell currents; stability estimation; static noise margin; supply levels; typical stability definition; write-ability estimation; Computer architecture; Correlation; Current measurement; Estimation; Stability criteria; Voltage measurement; Nonlinear regression; read retention voltage (RRV); read-static-noise-margin; static random-access memory (SRAM); write ability; write trip voltage (WTV);
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2012.2236113
  • Filename
    6414668