• DocumentCode
    157766
  • Title

    A Non-Inclusive Memory Permissions architecture for protection against cross-layer attacks

  • Author

    Elwell, Jesse ; Riley, Ryan ; Abu-Ghazaleh, N. ; Ponomarev, Dmitry

  • Author_Institution
    State Univ. of New York at Binghamton, Binghamton, NY, USA
  • fYear
    2014
  • fDate
    15-19 Feb. 2014
  • Firstpage
    201
  • Lastpage
    212
  • Abstract
    Protecting modern computer systems and complex software stacks against the growing range of possible attacks is becoming increasingly difficult. The architecture of modern commodity systems allows attackers to subvert privileged system software often using a single exploit. Once the system is compromised, inclusive permissions used by current architectures and operating systems easily allow a compromised high-privileged software layer to perform arbitrary malicious activities, even on behalf of other software layers. This paper presents a hardware-supported page permission scheme for the physical pages that is based on the concept of non-inclusive sets of memory permissions for different layers of system software such as hypervisors, operating systems, and user-level applications. Instead of viewing privilege levels as an ordered hierarchy with each successive level being more privileged, we view them as distinct levels each with its own set of permissions. Such a permission mechanism, implemented as part of a processor architecture, provides a common framework for defending against a range of recent attacks. We demonstrate that such a protection can be achieved with negligible performance overhead, low hardware complexity and minimal changes to the commodity OS and hypervisor code.
  • Keywords
    security of data; storage management; supervisory programs; arbitrary malicious activities; complex software stack protection; cross-layer attack protection; hardware complexity; hardware-supported page permission scheme; high-privileged software layer; hypervisor code; modern commodity systems; modern computer system protection; noninclusive memory permissions architecture; operating systems; ordered hierarchy; performance overhead; permission mechanism; privilege level; privileged system software; processor architecture; user-level applications; Hardware; Memory management; Permission; System software; Virtual machine monitors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computer Architecture (HPCA), 2014 IEEE 20th International Symposium on
  • Conference_Location
    Orlando, FL
  • Type

    conf

  • DOI
    10.1109/HPCA.2014.6835931
  • Filename
    6835931