DocumentCode :
157818
Title :
Reducing the cost of persistence for nonvolatile heaps in end user devices
Author :
Kannan, S. ; Gavrilovska, Ada ; Schwan, Karsten
Author_Institution :
Coll. of Comput., Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
2014
fDate :
15-19 Feb. 2014
Firstpage :
512
Lastpage :
523
Abstract :
This paper explores the performance implications of using future byte addressable non-volatile memory (NVM) like PCM in end client devices. We explore how to obtain dual benefits - increased capacity and faster persistence - with low overhead and cost. Specifically, while increasing memory capacity can be gained by treating NVM as virtual memory, its use of persistent data storage incurs high consistency (frequent cache flushes) and durability (logging for failure) overheads, referred to as `persistence cost´. These not only affect the applications causing them, but also other applications relying on the same cache and/or memory hierarchy. This paper analyzes and quantifies in detail the performance overheads of persistence, which include (1) the aforementioned cache interference as well as (2) memory allocator overheads, and finally, (3) durability costs due to logging. Novel solutions to overcome such overheads include (1) a page contiguity algorithm that reduces interference-related cache misses, (2) a cache efficient NVM write aware memory allocator that reduces cache line flushes of allocator state by 8X, and (3) hybrid logging that reduces durability overheads substantially. With these solutions, experimental evaluations with different end user applications and SPEC2006 benchmarks show up to 12% reductions in cache misses, thereby reducing the total number of NVM writes.
Keywords :
cache storage; durability; paged storage; phase change memories; NVM; PCM; SPEC2006 benchmarks; addressable nonvolatile memory; cache efficient NVM write aware memory allocator; cache interference; cache line flushes; consistency overheads; data storage; durability cost reduction; durability overheads; end client devices; hybrid logging; interference-related cache misses; memory capacity; page contiguity algorithm; performance overheads; persistence cost reduction; persistence overhead; phase change memory; virtual memory; Abstracts; Benchmark testing; Computer crashes; Microcontrollers; Nonvolatile memory; Random access memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computer Architecture (HPCA), 2014 IEEE 20th International Symposium on
Conference_Location :
Orlando, FL
Type :
conf
DOI :
10.1109/HPCA.2014.6835960
Filename :
6835960
Link To Document :
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