A multi-threading MPEG processor with variable issue modes

MPEG decoding chips have to support multiple features such as video stream decoding, transport stream parsing, multi-standard support, scan line conversion for on-screen display, and audio/video synchronization. Some of these features are computation-intensive, while others are size-intensive. In this paper an embedded processor specialized for the MPEG decoding is proposed to cope with the complicated requirements. The proposed processor can execute up to four operations at a time to handle intensive computation, and can change instruction issue rate according to the required performance in order to save code size which is very important in MPEG applications. In addition, the processor can switch tasks rapidly to keep the number of buffers existing between tasks minimal