Computing ADC harmonic content from a reduced number of values

The estimation of the harmonic content of an ADC output is fundamental to evaluate its suitability to perform according the requirements specified for an application. The use of the traditional frequency analysis leads to a large hardware overhead due to the amount of on-chip processing being involved, or to a large quantity of data to be transferred in case the processing is performed in a tester. This paper presents an algorithm capable of estimating the harmonics with similar accuracy but with the advantage of being more suitable for a BIST implementation, since it requires a reduced number of on-chip operations, and that only a small set of values has to be supplied outside the chip for further processing. It relies on the fact that harmonics generated by an ADC are mathematical related with the polynomial coefficients of its transfer function. ADC offset and gain errors can also be measured.