DocumentCode
1578406
Title
A low-complexity VLSI architecture of multidimensional TCM decoder for ADSL
Author
Lee, Keumhyung ; Kim, Jaeseok
Author_Institution
Dept. of Electron. & Comput. Eng., Yonsei Univ., Seoul, South Korea
fYear
1999
fDate
6/21/1905 12:00:00 AM
Firstpage
578
Lastpage
581
Abstract
We propose a low complexity M-D (multidimensional) TCM decoder VLSI architecture for ADSL System. We use the shared subset decoder module by modifying the whole decoding procedure. Also we improve the decoding speed by using the MSA (module set area) operation, which removes multiplication in 4D metric calculation. So the proposed TCM decoder reduces chip area and can be adopted in high-speed xDSL system
Keywords
VLSI; computational complexity; decoding; digital signal processing chips; digital subscriber lines; trellis coded modulation; 4D metric; ADSL; high-speed xDSL system; low-complexity VLSI architecture; module set area operation; multidimensional TCM decoder; shared subset decoder module; Application specific integrated circuits; Bit rate; Computer architecture; Convolutional codes; Data mining; Decoding; Design engineering; Encoding; OFDM modulation; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI and CAD, 1999. ICVC '99. 6th International Conference on
Conference_Location
Seoul
Print_ISBN
0-7803-5727-2
Type
conf
DOI
10.1109/ICVC.1999.821005
Filename
821005
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