DocumentCode
157853
Title
Low-overhead and high coverage run-time race detection through selective meta-data management
Author
Ruirui Huang ; Halberg, Erik ; Ferraiuolo, Andrew ; Suh, G. Edward
Author_Institution
Intel Corp., Hillsboro, OR, USA
fYear
2014
fDate
15-19 Feb. 2014
Firstpage
96
Lastpage
107
Abstract
This paper presents an efficient hardware architecture that enables run-time data race detection with high coverage and minimal performance overhead. Run-time race detectors often rely on the happens-before vector clock algorithm for accuracy, yet suffer from either non-negligible performance overhead or low detection coverage due to a large amount of meta-data. Based on the observation that most of data races happen between close-by accesses, we introduce an optimization to selectively store meta-data only for recently shared memory locations and decouple meta-data storage from regular data storage such as caches. Experiments show that the proposed scheme enables run-time race detection with a minimal impact on performance (4.8% overhead on average) with very high detection coverage (over 99%). Furthermore, this architecture only adds a small amount of on-chip resources for race detection: a 13-KB buffer per core and a 1-bit tag per data cache block.
Keywords
cache storage; computer architecture; meta data; optimisation; vectors; data cache block; data storage; hardware architecture; high coverage run-time race detection; low-overhead run-time race detection; optimization; selective meta-data management; vector clock algorithm; Abstracts; Clocks; Instruction sets; Synchronization; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computer Architecture (HPCA), 2014 IEEE 20th International Symposium on
Conference_Location
Orlando, FL
Type
conf
DOI
10.1109/HPCA.2014.6835979
Filename
6835979
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