DocumentCode
1579086
Title
A full custom VLSI design methodology using Mentor Graphics design software in an educational environs
Author
Schneider, Thomas R. ; Schwab, Andrew J. ; Aylor, James H.
Author_Institution
Virginia Univ., Charlottesville, VA, USA
fYear
1993
Firstpage
305
Lastpage
308
Abstract
An 8-b arithmetic logic unit (ALU) was schematic-captured, simulated, physically designed, and resimulated with parasitics using Mentor Graphics design tools and a full custom methodology. The design can be fabricated with confidence that it will perform as expected. The design has demonstrated how a commercial design tool can effectively be used in an educational environment. Many tool related issues that came up were resolved using resources at hand, or with the help of external resources such as the software vendor, fabrication facility, or uses at other educational institutions. Students benefit from this effort because they can use commercial tools to understand important VLSI performance issues
Keywords
VLSI; application specific integrated circuits; circuit layout CAD; computer aided instruction; electronic engineering education; logic CAD; software tools; 8 bit; ASIC; Mentor Graphics design software; arithmetic logic unit; commercial design tool; educational environment; full custom VLSI design methodology; Circuit simulation; Design methodology; Educational institutions; Electronic design automation and methodology; Fabrication; Graphics; Logic design; Software design; Software tools; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International
Conference_Location
Rochester, NY
Print_ISBN
0-7803-1375-5
Type
conf
DOI
10.1109/ASIC.1993.410728
Filename
410728
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