• DocumentCode
    1580117
  • Title

    Index generation functions: Theory and applications

  • Author

    Sasao, Tsutomu

  • Author_Institution
    Dept. of Comput. Sci. & Electron., Kyushu Inst. of Technol., Iizuka, Japan
  • fYear
    2010
  • Firstpage
    585
  • Lastpage
    590
  • Abstract
    This survey first introduces index generation functions, which are useful for pattern matching in the communication circuit. Then, it shows various methods to realize index generation functions by using LUTs and memories. These methods are useful to design FPGAs with embedded memories.
  • Keywords
    embedded systems; field programmable gate arrays; logic design; pattern matching; FPGA design; LUT; communication circuit; embedded memory; index generation functions; pattern matching; Electronic mail; Generators; Indexes; Logic gates; Programmable logic arrays; Read only memory; Table lookup;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communications and Information Technologies (ISCIT), 2010 International Symposium on
  • Conference_Location
    Tokyo
  • Print_ISBN
    978-1-4244-7007-5
  • Electronic_ISBN
    978-1-4244-7009-9
  • Type

    conf

  • DOI
    10.1109/ISCIT.2010.5665057
  • Filename
    5665057