Crosstalk minimization in VLSI design using signal transition avoidance

Crosstalk appears in various electrical circuits and chip design. This is due to stretches of overlapping wires that produce parasitic coupling between adjacent signal lines. In VLSI design, crosstalk creates a lot of problems. Crosstalk minimization problem is NP complete. The research is to find the solution with minimum crosstalk by using signal transition avoidance technique. We use simulated annealing algorithm to search for the optimal layout pattern. Different generation sequence of a graph give diverse alternatives for horizontal constraint graph of a VLSI channel. The energy function can be designed to take care of crosstalk in the channel. The optimization result, gives the routing solution with minimum crosstalk and minimal total energy. We reduce total energy through capacitance by rearranging wire signal transition. The crosstalk noise model is a proposed concept of effective signal transition consideration. The proposed technique is developed based on a decreasing coupling technique exhibiting a total energy of 6.9 as compared to average energy of all possible patterns. In addition, the result of optimal pattern is 24.4% less than cost of the original layout pattern.