DocumentCode :
1581744
Title :
Impact of the parasitic capacitances with the change of distance between gates of the split-gate VDMOS
Author :
Chen, Qianwen ; Feng, Quanyuan
Author_Institution :
Institute of Microelectronics, Southwest Jiaotong University, Chengdu, China
fYear :
2012
Firstpage :
1
Lastpage :
4
Abstract :
A split-gate structure of power VDMOS is proposed in this paper. The p-base of the split-gate VDMOS is formed by self-aligned ion implanted. Only five masks is used to fabrication while the performance of the split-gate VDMOS is better than the conventional VDMOS. Compared to present structure, the split-gate structure can effectively reduce the device parasitic capacitances and the reliability is guaranteed. With the change of the distance between gates of the split-gate VDMOS, impact of the parasitic capacitances is analyzed.
Keywords :
VDMOS; parasitic capacitances; self-aligned; split-gate;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
World Automation Congress (WAC), 2012
Conference_Location :
Puerto Vallarta, Mexico
ISSN :
2154-4824
Print_ISBN :
978-1-4673-4497-5
Type :
conf
Filename :
6321339
Link To Document :
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