Title :
Template matching operations on a dynamically reconfigurable vision-chip architecture
Author :
Nakada, Hironari ; Watanabe, Minoru
Author_Institution :
Electr. & Electron. Eng., Shizuoka Univ., Shizuoka, Japan
Abstract :
Recently, for autonomous vehicles and robots, demand has been increasing for high-speed image recognition that is superior to that of the human eye. To date, analog-type vision chips and digital vision chips have been developed. Nevertheless, even now, to realize such high-speed real-time image recognition operation is extremely difficult. Therefore, to realize a high-speed real-time image-recognizable vision chip, this paper experimentally presents a template matching operations on a dynamically reconfigurable vision-chip architecture.
Keywords :
image matching; image processing equipment; image recognition; mobile robots; reconfigurable architectures; analog-type vision chips; autonomous robots; autonomous vehicles; digital vision chips; dynamically reconfigurable vision-chip architecture; high-speed image recognition; human eye; template matching operations; vision-chip architecture; Context; Holographic optical components; Holography; Image recognition; Logic gates; Optical imaging; Photodiodes; Dynamically reconfigurable devices; Field Programmable Gate Arrays; Vision chips;
Conference_Titel :
Communications and Information Technologies (ISCIT), 2010 International Symposium on
Conference_Location :
Tokyo
Print_ISBN :
978-1-4244-7007-5
Electronic_ISBN :
978-1-4244-7009-9
DOI :
10.1109/ISCIT.2010.5665152
