Title :
Reducing operating voltage from 3, 2, to 1 volt and below-challenges and guidelines for possible solutions [CMOS]
Author :
Yan, Ran-Hong ; Monroe, Don ; Weis, Jurgen ; Mujtaba, Aon ; Westerwick, Eric
Author_Institution :
AT&T Bell Labs., Holmdel, NJ, USA
Abstract :
We discuss challenges to reducing integrated circuit power consumption by reducing operating voltage, and guidelines for possible solutions via processing technology and circuit design. Migrating from 3-Volt to 2-Volt operation, the key issue is optimizing the processing technology to maintain the performance. At 1 Volt, interfacing low-voltage circuits with standard I/O becomes the main challenge. To go below 1 Volt, we must re-visit transistor design issues very carefully
Keywords :
CMOS integrated circuits; integrated circuit design; integrated circuit reliability; integrated circuit technology; circuit design; integrated circuit power consumption; low-voltage circuit interfacing; operating voltage; processing technology; transistor design issues; CMOS technology; Capacitance; Circuit synthesis; Energy consumption; Guidelines; Integrated circuit technology; MOS devices; Maintenance; Performance loss; Voltage;
Conference_Titel :
Electron Devices Meeting, 1995. IEDM '95., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2700-4
DOI :
10.1109/IEDM.1995.497181
