A sub-100 μW 1.9-GHz CMOS oscillator using FBAR resonator

Author

Chee, Y.H. ; Niknejad, A.M. ; Rabaey, J.

Author_Institution

Dept. of EECS, California Univ., Berkeley, CA, USA

fYear

2005

Firstpage

123

Lastpage

126

Abstract

The paper presents an ultra-low power CMOS oscillator using film bulk acoustic resonator (FBAR). The 1.9-GHz oscillator consumes 89 μW from a low supply voltage of 430 mV and achieves an excellent phase-noise performance of -98 dBc/Hz, -120 dBc/Hz and -138 dBc/Hz at 10 kHz, 100 kHz and 1 MHz offset, respectively. The oscillator is implemented in a standard 130 nm CMOS process and packaged using chip-on-board techniques. Compared with other state-of-the-art oscillators, this oscillator has the best figure-of-merit (Ham, D. et al., IEEE J. Solid State Circuits, vol.36, no.6, p.896-909, 2001). To the authors´ knowledge, this is the first sub-100 μW GHz-range oscillator reported.

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; UHF oscillators; acoustic resonators; chip-on-board packaging; integrated circuit design; phase noise; 1.9 GHz; 130 nm; 430 mV; 89 muW; CMOS oscillator design; chip-on-board techniques; figure-of-merit; film bulk acoustic resonator; phase-noise; ultra-low power oscillator; Electrodes; Film bulk acoustic resonators; Frequency response; Inductance; Inductors; Parasitic capacitance; Phase noise; Radiofrequency integrated circuits; Transconductance; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE

ISSN

1529-2517

Print_ISBN

0-7803-8983-2

Type

conf

DOI

10.1109/RFIC.2005.1489606

Filename

1489606