The 3rd dimension-More Life for Moore´s Law

In accordance with continuing push for smaller and faster electronics, there is strong demand for further miniaturization and higher performance of mobile and other digital devices. Three-dimensional interconnect with through silicon via is one of the solution with best potential to extend Moore´s Law. 3D interconnect had the benefits of lower cost, higher performance, smaller form factor and heterogeneous integration for chips manufacturing. Thermal dissipation, process technology and circuit design are the top three issues for 3D IC success. For Si processing, the major challenges are the patterning and the fill of the through wafer via, wafer thinning, die/wafer bonding and its alignment. We need to carefully address those issues before we can proceed to mass production