DocumentCode :
1583448
Title :
Three dimensional PVD virtual reactor for VLSI metallization
Author :
Bang, D.S. ; McVittie, J.P. ; Saraswat, K.C. ; Krivokapic, Z. ; Iacoponi, J.A. ; Gray, J.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
fYear :
1995
Firstpage :
97
Lastpage :
100
Abstract :
A three dimensional Physical Vapor Deposition (PVD) virtual reactor is presented which uses 3-d particle flux data generated by equipment level models in order to simulate 3-d metal film profiles for VLSI scale features. A calibration methodology which links the 3-d virtual reactor with a computationally efficient “3-2d” simulator is demonstrated, and an accuracy criteria which specifies when the full 3-d code is more accurate than its 3-2d counterpart is calculated. Experimental Ti/Al depositions were performed for 3-d structures, and the corresponding SEM cross sections are compared to simulated data
Keywords :
VLSI; aluminium; integrated circuit metallisation; scanning electron microscopy; semiconductor process modelling; sputter deposition; surface topography; titanium; 3D gridding; 3D metal film profile simulation; 3D particle flux data; SEM cross sections; SPEEDIE 3D virtual reactor; Ti-Al; Ti/Al metal stacks; VLSI metallization; calibration methodology; computationally efficient 3-2D simulator; equipment level models; three dimensional physical vapor deposition virtual reactor; topography modeling; Atherosclerosis; Computational modeling; Inductors; Metallization; Semiconductor device modeling; Solid modeling; Sputtering; Substrates; Surface topography; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1995. IEDM '95., International
Conference_Location :
Washington, DC
ISSN :
0163-1918
Print_ISBN :
0-7803-2700-4
Type :
conf
DOI :
10.1109/IEDM.1995.497191
Filename :
497191
Link To Document :
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