Title :
Deterministic bist in partial scan environment
Author :
Greene, Brian ; Kay, Dennis ; Mourad, S.
Author_Institution :
Santa Clara University
Keywords :
Built-in self-test; Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Logic testing; Sequential analysis; Sequential circuits; System testing;
Conference_Titel :
Instrumentation and Measurement Technology Conference, 2003. IMTC '03. Proceedings of the 20th IEEE
Print_ISBN :
0-7803-7705-2
DOI :
10.1109/IMTC.2003.1208171