Implementation and performance of GaAs digital signal processing ASICs

Author

Whitaker, William D. ; Buchanan, Jeffery R. ; Burke, Gary R. ; Chow, Terrence W. ; Graham, J. Scott ; Kowalski, James E. ; Lam, Barbara ; Siavoshi, Fardad ; Thompson, Matthew S. ; Johnson, Robert A.

Author_Institution

Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA

fYear

1993

Firstpage

386

Lastpage

394

Abstract

The feasibility of performing high speed digital signal processing in GaAs gate array technology has been demonstrated with the successful implementation of a VLSI communications chip set for NASA´s Deep Space Network. The techniques developed to solve some of the technology and implementation problems associated with large scale integration of GaAs gate arrays are described

Keywords

III-V semiconductors; application specific integrated circuits; digital signal processing chips; field effect digital integrated circuits; gallium arsenide; logic arrays; space communication links; very high speed integrated circuits; GaAs; III-V semiconductors; NASA´s Deep Space Network; VLSI communications chip; deep space communication; digital signal processing ASIC; gate array technology; ground based digital receiver; high speed; implementation problems; performance; Application specific integrated circuits; Design methodology; Digital signal processing; Gallium arsenide; Laboratories; Packaging; Propagation delay; Propulsion; Space technology; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International

Conference_Location

Rochester, NY

Print_ISBN

0-7803-1375-5

Type

conf

DOI

10.1109/ASIC.1993.410745

Filename

410745