Fault-tolerant parallel processing with real-time error detection and recovery

Presents a unique error recovery mechanism based on new cache states, verified and non-verified, to detect and recover errors produced by the processor or cache memory or both due to transient faults. The scheme remedies the insufficiency of the error-correcting code when faced with processor transient faults. This cache-based recovery method not only recovers errors in a local cache memory but also prevents the propagation of error to other caches. It is shown that this new error recovery scheme can be easily integrated with existing cache coherency protocols