A microprocessor interface for ferroelectric capacitor memory

Author

Fouts, Douglas J. ; Gonter, Thomas C.

Author_Institution

Dept. of Electr. & Comput. Eng., US Naval Postgrad. Sch., Monterey, CA, USA

fYear

1992

Firstpage

930

Abstract

An interface that maps a block of ferroelectric capacitor memory (FECM) into the address space of a microprocessor in such a way that it can write and read the memory as if it were a fully decoded silicon SRAM is described. The circuit has been breadboarded and tested and found to be 100% functional. A CMOS VLSI implementation of the interface is feasible and is being considered. Applications for FECMs and the proposed VLSI interface chip in portable, embedded, space-based, and weapon-based computers are discussed

Keywords

CMOS integrated circuits; VLSI; ferroelectric storage; peripheral interfaces; CMOS VLSI implementation; FECMs; address space; ferroelectric capacitor memory; microprocessor interface; portable computers; space-based computers; weapon-based computers; Application software; Capacitors; Circuit testing; Decoding; Ferroelectric materials; Microprocessors; Random access memory; Read-write memory; Silicon; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems and Computers, 1992. 1992 Conference Record of The Twenty-Sixth Asilomar Conference on

Conference_Location

Pacific Grove, CA

ISSN

1058-6393

Print_ISBN

0-8186-3160-0

Type

conf

DOI

10.1109/ACSSC.1992.269084

Filename

269084

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1584211