Analog CMOS IC block-diagram-level design capture, functional simulation, and layout assembly

Author

Current, Wayne

Author_Institution

Dept. of Electr. Eng., California Univ., Davis, CA, USA

fYear

1992

Firstpage

671

Abstract

A computer aided design system to assist in the fast prototyping of analog CMOS ICs is presented. This CAD system allows the designer to create a design by selecting analog function blocks from a library and interconnecting them in a block-diagram-level design capture and simulation page. The new analog circuit is then simulated at a high level, a functional level, to evaluate circuit performance. The IC layout design is then assembled by a cell placement and routing program using cell layouts from the cell library. This assembled IC design layout is ready for submission for fabrication. Examples illustrate features of this CAD system

Keywords

CMOS integrated circuits; circuit analysis computing; circuit layout CAD; linear integrated circuits; IC layout design; analog CMOSIC; analog function blocks; block-diagram-level design capture; cell layouts; cell library; cell placement program; circuit performance; computer aided design system; functional simulation; high level simulation; layout assembly; routing program; Analog computers; Analog integrated circuits; Assembly; CMOS analog integrated circuits; CMOS integrated circuits; Circuit simulation; Design automation; Integrated circuit layout; Libraries; Prototypes;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems and Computers, 1992. 1992 Conference Record of The Twenty-Sixth Asilomar Conference on

Conference_Location

Pacific Grove, CA

ISSN

1058-6393

Print_ISBN

0-8186-3160-0

Type

conf

DOI

10.1109/ACSSC.1992.269111

Filename

269111