Title :
Effects of interface-trapped charge on the SiC MOSFET characteristics
Author :
Scozzi, C.J. ; McGarrity, James M.
Author_Institution :
U.S. Army Res. Lab., Adelphi, MD, USA
Abstract :
High quality SiC/SiO2 interfaces are critical to the development of silicon carbide power MOSFETs, IGBTs, and MOS-controlled thyristors. In this work, we examine the effects of thermal stress on the SiC/SiO2 interface of n-channel MOSFETs that had gate oxides formed by low-pressure chemical-vapor deposition on the silicon face of a 6H-SiC epitaxial layer with subsequent re-oxidation to improve the interface. These devices were found to have a pre-stress mean interface-trap density of 5×1011 cm-2 eV-1 at room temperature. The interface-trap density for these oxides was shown to be significantly increased by applying moderate stress (2 MV/cm) at 300°C. The post-stress change in device characteristics is shown to be consistent with the stress-induced increase in interface traps
Keywords :
high-temperature electronics; interface states; power MOSFET; semiconductor device testing; silicon compounds; thermal stresses; wide band gap semiconductors; 300 C; 6H-SiC epitaxial layer; I-V characteristics; SiC MOSFET characteristics; SiC-SiO2; gate oxides; high quality SiC/SiO2 interfaces; interface-trap density; interface-trapped charge effects; low-pressure chemical-vapor deposition; n-channel MOSFETs; power MOSFET; re-oxidation; stress-induced trap density increase; thermal stress; Chemicals; Degradation; Dielectric devices; Epitaxial layers; Laboratories; MOSFET circuits; Silicon carbide; Temperature; Thermal stresses; Voltage;
Conference_Titel :
High Temperature Electronics Conference, 1998. HITEC. 1998 Fourth International
Conference_Location :
Albuquerque, NM
Print_ISBN :
0-7803-4540-1
DOI :
10.1109/HITEC.1998.676755
