Title :
Hardware implementation of a novel, reduced rating active filter for 3-phase, 4-wire loads
Author :
Kamath, Girish ; Mohan, Ned ; Albertson, Vernon D.
Author_Institution :
Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA
Abstract :
This paper presents the hardware results of a new active filter topology with reduced VA rating for 3-phase, 4-wire loads. The scheme consists of a single-phase inverter connected between the zig-zag transformer neutral and the utility neutral in addition to a three-phase inverter connected to the delta winding of the zig-zag transformer. Compared to other reported schemes, the inverter VA rating in this scheme is reduced by a factor of six. This reduction in the inverter VA rating is mainly due to the zero-sequence current inverter having a low VA rating. The equations for this active filter are derived. The simulation results are verified by means of experimental results from a proof-of-concept prototype
Keywords :
DC-AC power convertors; active filters; invertors; power transformers; simulation; 3-phase loads; 4-wire loads; delta winding; hardware implementation; proof-of-concept prototype; reduced rating active filter; simulation; single-phase inverter; zero-sequence current inverter; zig-zag transformer neutral; Active filters; Circuits; Computational modeling; Drives; Equations; Hardware; Inverters; Power harmonic filters; Topology; Virtual prototyping;
Conference_Titel :
Applied Power Electronics Conference and Exposition, 1995. APEC '95. Conference Proceedings 1995., Tenth Annual
Conference_Location :
Dallas, TX
Print_ISBN :
0-7803-2482-X
DOI :
10.1109/APEC.1995.469060
