Title :
High-speed FPGA-based SOPC application for currency sorting system
Author :
Jianping, Wu ; Ye Yutang ; Lin, Liu ; Bingquan, Huang ; Tao, Guo
Author_Institution :
Coll. of Optoelectron. Inf., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
A high-speed real-time currency sorting system based on SOPC of FPGA is designed against the existing problems in our country, such as the high complexity, the lower stability, the low real-time performance of complex algorithms for high-speed digital image signal and that the system is difficult to upgrade in real time, etc. The methods of software simulation, real-time debugging online are applied; the real-time processing of complex image algorithms has been achieved successfully and the system complexity has been reduced; the integration and stability of the system have been greatly improved. Furthermore the operation of FPGA could be performed in parallel and the responsive time of its hardware could be accurate to nanosecond (ns) level. So the real-time processing properties of the system have more advantages against other processing platforms. Because of the system programmable performance, the real-time updates of the system without changing the hardware circuit have also been implemented.
Keywords :
field programmable gate arrays; performance evaluation; program debugging; real-time systems; system-on-chip; FPGA; SOPC; complex image algorithms; currency sorting system; hardware circuit; integration; real-time debugging; real-time processing; software simulation; stability; system programmable performance; Debugging; Educational institutions; Field programmable gate arrays; Hardware; Real time systems; SDRAM; Software; FPGA; MicroBlaze; SOPC; currency sorting;
Conference_Titel :
Electronic Measurement & Instruments (ICEMI), 2011 10th International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-8158-3
DOI :
10.1109/ICEMI.2011.6037771