Title :
A New Phase Noise Model for TSPC based divider
Author :
Yu, X.P. ; Do, M.A. ; Ma, J.-G. ; Yeo, K.S.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Abstract :
A new time variant model for the time domain jitter in the TSPC frequency divider is proposed. The trade-off between the phase noise and power consumption in the prescaler design is analyzed. Based on the analysis, a new prescaler that has a better balance among the operating frequency, power consumption and phase noise is proposed. The analysis is verified by the simulation and measured results in this prescaler
Keywords :
asynchronous circuits; circuit noise; frequency dividers; jitter; network synthesis; phase noise; prescalers; TSPC frequency divider; phase noise model; power consumption; prescaler design; time domain jitter; time variant model; Circuit noise; Energy consumption; Frequency conversion; Jitter; Noise measurement; Phase locked loops; Phase measurement; Phase noise; Signal to noise ratio; Synthesizers;
Conference_Titel :
Very Large Scale Integration, 2006 IFIP International Conference on
Conference_Location :
Nice
Print_ISBN :
3-901882-19-7
DOI :
10.1109/VLSISOC.2006.313259
