DocumentCode :
1587167
Title :
SOC Debug Challenges and Tools
Author :
Schultz, Kenneth ; Paranjape, Ketan
Author_Institution :
Intel Corp., Chandler, AZ
fYear :
2006
Firstpage :
385
Lastpage :
390
Abstract :
This paper provides an overview of the problems that Intel encountered over the last five years during the evolution of our system on a chip (SOC) products and debug methodology. The topics covered include debug tools, types of bugs, and general data that support the infrastructure needed to validate an SOC. The paper discusses the diverse post-silicon issues encountered while debugging silicon
Keywords :
integrated circuit testing; system-on-chip; SOC debug; system on a chip testing; Circuit synthesis; Clocks; Computer bugs; Debugging; Engines; Frequency; Power control; Silicon; System-on-a-chip; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Very Large Scale Integration, 2006 IFIP International Conference on
Conference_Location :
Nice
Print_ISBN :
3-901882-19-7
Type :
conf
DOI :
10.1109/VLSISOC.2006.313266
Filename :
4107662
Link To Document :
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