Application of process statistics to macro/behavioral modeling

Transistor level simulation of integrated circuits requires device models that accurately reflect the variability of the manufacturing process. This can be accomplished by correlating the SPICE model parameters to the process characteristics. A procedure to extend this philosophy to block level macro/behavioral models is described. Included in this concept is the automated extraction of block level performance characteristics from a circuit, correlation of these characteristics to process/device level statistics, and development of tools to permit the concise description of a macro/behavioral model´s statistical behavior