• DocumentCode
    1587850
  • Title

    A minimum-area floorplanning algorithm for MBC designs

  • Author

    Mehta, Dinesh P. ; Sherwani, Naveed

  • Author_Institution
    Space Inst., Tennessee Univ., TN, USA
  • fYear
    1996
  • Firstpage
    56
  • Lastpage
    59
  • Abstract
    This paper identifies important objectives that an MBC floorplanner using flexible, arbitrary rectilinear shapes for standard cell regions should achieve including area minimization, proximity, and connectivity. It then presents an algorithm that guarantees area minimization and connectivity and gives good results with respect to proximity
  • Keywords
    cellular arrays; circuit optimisation; integrated circuit layout; minimisation; MBC design; area minimization; connectivity; floorplanning algorithm; proximity; rectilinear shapes; standard cell; Algorithm design and analysis; Logic; Polynomials; Routing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI, 1996. Proceedings., Sixth Great Lakes Symposium on
  • Conference_Location
    Ames, IA
  • ISSN
    1066-1395
  • Print_ISBN
    0-8186-7502-0
  • Type

    conf

  • DOI
    10.1109/GLSV.1996.497593
  • Filename
    497593
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1587850