DocumentCode :
1588152
Title :
Notice of Violation of IEEE Publication Principles
A 3.3V 10Gb/s SiGe limiting transimpedance amplifier using a pseudo-differential input and a limiting Cherry-Hooper stage
Author :
Maxim, A.
Author_Institution :
Integrated Products, Austin, TX, USA
fYear :
2005
Firstpage :
313
Lastpage :
316
Abstract :
Notice of Violation of IEEE Publication Principles

"A 3.3V 10Gb/s SiGe limiting transimpedance amplifier using a pseudo-differential input and a limiting Cherry-Hooper stage"
by Maxim, A.
in the Proceedings of the 2005 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Digest of Papers.
12-14 June 2005 Page(s): 313-316

After careful and considered review, it has been determined that the above paper is in violation of IEEE\´s Publication Principles.

Specifically, the paper contains information that Adrian Maxim admits had been falsified. In response to an inquiry on this misconduct, Mr. Maxim acknowledged that the following people who have been listed as co-authors on several of his papers are fabricated names and that he is the only author:

C. Turinici, D. Smith, S. Dupue, M. Gheorge, R. Johns, D. Antrik

Additionally, in papers by Mr. Maxim that have co-authors other than those listed above, it was discovered in some cases that he had not consulted with them while writing the papers, and submitted papers without their knowledge.

Although Mr. Maxim maintains that not all of the data is falsified, IEEE nevertheless cannot assure the integrity of papers posted by him because of his repeated false statements.

Due to the nature of this violation, reasonable effort should be made to remove all past references to the above paper, and to refrain from any future references.A 10 Gb/s limiting transimpedance amplifier was realized in a 0.2 μm SiGe technology having a 60 GHz transition frequency. A pseudo-differential common-emitter input stage with both capacitive and input bondwire inductive peaking was used to achieve high bandwidth and low noise performance. Cascode configurations and Miller capacitance neutralization techniques were used to minimize the input capacitance of the high current stages. This eliminates or reduces to one the number of inter-stage isolation emitter followers, and therefor- allows a low voltage operation. The limiting amplifier uses a modified Cherry-Hooper architecture having a cross-coupled pair that speeds-up the switching and thus reduces its noise sensitivity.
Keywords :
MMIC amplifiers; bipolar MMIC; differential amplifiers; feedback amplifiers; limiters; low-power electronics; wideband amplifiers; 10 Gbit/s; 3.3 V; 60 GHz; HBT technology; Miller capacitance neutralization techniques; SiGe; capacitive peaking; cascode configuration; cross-coupled pair; high bandwidth amplifier; high current stage input capacitance minimization; input bondwire inductive peaking; inter-stage isolation emitter followers; limiting Cherry-Hooper stage; limiting transimpedance amplifier; low noise amplifier; low voltage operation; pseudo-differential common-emitter input stage; shunt resistive feedback; wideband voltage amplifiers; Bandwidth; Capacitance; Frequency; Germanium silicon alloys; Notice of Violation; Optical amplifiers; Optical fiber communication; Radiofrequency amplifiers; Radiofrequency integrated circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE
Conference_Location :
Long Beach, CA, USA
ISSN :
1529-2517
Print_ISBN :
0-7803-8983-2
Type :
conf
DOI :
10.1109/RFIC.2005.1489795
Filename :
1489795
Link To Document :
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