DocumentCode :
1588595
Title :
Performance analysis for a two level cache system
Author :
Mekhiel, Nagi N. ; McCrackin, Daniel C.
Author_Institution :
Dept. of Electr. Eng., Ryerson Polytech. Inst., Toronto, Ont., Canada
fYear :
1992
Firstpage :
71
Abstract :
A simple analytical model for a two-level cache system is developed. The model evaluates the effect of different parameters on the overall system performance. It includes three different designs that are generated from using the write through and the write back methods for the first and the second level cache. The model defines an improved write policy for write back. During a write miss to a clean block the model can write to the cache similar to a write hit. The model shows that increasing the block size for the first level cache could decrease system performance, and the size increase of the second level cache has a greater effect on the performance when the system uses a larger first level cache
Keywords :
buffer storage; performance evaluation; analytical model; first level cache; performance analysis; second level cache; system performance; two level cache system; write back; write policy; Analytical models; Delay systems; Design optimization; Microprocessors; Performance analysis; Read-write memory; Reduced instruction set computing; System performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 1992. 1992 Conference Record of The Twenty-Sixth Asilomar Conference on
Conference_Location :
Pacific Grove, CA
ISSN :
1058-6393
Print_ISBN :
0-8186-3160-0
Type :
conf
DOI :
10.1109/ACSSC.1992.269255
Filename :
269255
Link To Document :
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