Title :
CMOS implementation of envelope detector circuit in 0.18µm Process
Author :
Fahsyar, P.N.A. ; Soin, N.
Author_Institution :
Dept. of Electr. Eng., Univ. of Malaya (UM), Kuala Lumpur, Malaysia
Abstract :
This paper presents an envelope detector circuit design for RFID applications implemented in 0.18μm CMOS technology. Towards the design compatibility with standard digital CMOS process, the doubler cell, diode connected PMOS and low transconductance transistor are chosen to place in the rectifier section and to replace the conventional diode as well as the resistor. The proposed envelope detector circuit was simulated with a 150mV - 250mV input signal. With 0.2 modulation index at 900MHz carrier frequency, the power dissipation is found to be 18.8μW at 27°C.
Keywords :
CMOS digital integrated circuits; radiofrequency identification; RFID application; design compatibility; digital CMOS process; envelope detector circuit; frequency 900 MHz; power 18.8 muW; size 0.18 mum; temperature 27 degC; transconductance transistor; voltage 150 mV to 250 mV; CMOS process; CMOS technology; Circuit simulation; Circuit synthesis; Diodes; Envelope detectors; Radiofrequency identification; Rectifiers; Resistors; Transconductance;
Conference_Titel :
Semiconductor Electronics (ICSE), 2010 IEEE International Conference on
Conference_Location :
Melaka
Print_ISBN :
978-1-4244-6608-5
DOI :
10.1109/SMELEC.2010.5549383
