DocumentCode :
1589501
Title :
A 40 GHz 2.1 V static frequency divider in SiGe using a low-voltage latch topology
Author :
Kucharski, Daniel ; Kornegay, Kevin T.
Author_Institution :
Cornell Univ., Ithaca, NY, USA
fYear :
2005
Firstpage :
461
Lastpage :
464
Abstract :
An alternative low-voltage latch topology based on switched emitter followers is proposed, and its characteristics are compared to a traditional current-mode latch. A static 1:8 frequency divider based on this latch is implemented in a SiGe BiCMOS technology with fT=120 GHz. The divider operates at a maximum frequency of 42 GHz and consumes 160 mW from a 2.1 V power supply.
Keywords :
BiCMOS logic circuits; Ge-Si alloys; flip-flops; frequency dividers; high-speed integrated circuits; integrated circuit design; logic design; network topology; 160 mW; 2.1 V; 40 GHz; BiCMOS technology; SiGe; current-mode latch; flip-flops; frequency conversion; high-speed integrated circuits; logic design; low-voltage latch topology; static frequency divider; switched emitter followers; CMOS technology; Circuit topology; Frequency conversion; Germanium silicon alloys; Latches; Logic devices; Optical frequency conversion; Silicon germanium; Tail; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE
ISSN :
1529-2517
Print_ISBN :
0-7803-8983-2
Type :
conf
DOI :
10.1109/RFIC.2005.1489844
Filename :
1489844
Link To Document :
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